# The Clock and the Clocked Logic

Clocked Logic is responsible for the synchronization of what’s happening inside a computer. When analyzing the upcoming circuits, we will often speak of voltage pulses and clock cycles. It’s now the time to approach this subject, in order to proceed with a better knowledge about this said clock.

What is the clock?

When voltage is applied to a quartz crystal, it generates pulses with a certain frequency. This frequency depends on the configuration (shape and dimensions) of said quartz crystal. Thus, each crystal vibrates at a very precise and constant frequency. The vibration frequency is measured in Hertz (Hz). One Hertz corresponds to one cycle per second.

For example, a quartz crystal vibrating at a frequency of 1,000 cycles per second (1,000 Hz or 1 kHz) tells us that a second goes by every thousand pulses, with exact precision. The logic behind a quartz watch is precisely this. After every thousand pulses, a counter signals that one second has elapsed. We mentioned the binary counter, a circuit that we will analyze further ahead.

It’s precisely such a crystal that synchronizes the logic of a computer, where such a frequency is called clock.

When we say that a processor has a speed of 3 GHz, what we mean to say, in fact, is that the processor operates with a clock frequency of 3 billion pulses (or cycles) per second. This feature is not about speed, but rather about clock frequency.

What is this “clock” good for?

The bits work in groups of 8, 16, 32 or 64, same as the bandwidth of a CPU bus, and that of the registers that perform the tasks entrusted by the CPU.

As we’ve seen in the circuit we created for multiplications, each of the bits involved in the process has different tasks. Some of them accomplish immediately their task, but the remaining are accomplishing the tasks one after the other, and taking more time, because they all have different ways to go.

Let’s imagine that our group of bits has to deliver a message, in ex., a Word, and that each bit is responsible for finding and delivering one Letter of that Word.

How do we get to know that we’ve reached the end, when all the bits of the group can be read and give the correct Letter, so that we can be sure we get the correct Word from reading the message?

Well, for that to be possible, we must establish a barrier, something like a finish line in a race, where each bit checks in with the Letter it carries, its contribution to the result.

All Right! But how can we determine the exact location where all they should meet, each one carrying its Letter of the Word, so that the message can be properly read?

The best way is probably to create a location where the more rushed bits are left waiting for the slower bits. Once they are all together, each one can deliver its part of the information, so that the result can be read. But they will not be waiting forever. You need to set a time limit for everyone to be there.

It is precisely here that the clocked logic comes into play. Every task has a  period  of time to be executed, granted by the CPU to its bits. By the end of this period of time, each one must have fulfilled its task. And this  period of time is regulated precisely by the clock cycle, which will have a role in the synchronization of all activity on the CPU and on the computer.

The bits know that they can only perform one task in each cycle. So they stop and wait for the others, and then start a new task in a new cycle.

And how do they know where to wait?

That’s a good question. It’s certainly not at the spot in their route where they complete their task. That way, each one would be in an undefined place. How would the CPU be able to see them all together?

They will wait ​​in specific circuits that we’ll see later on, such as the Latches, a kind of Guesthouse that are present in the paths of the bits. Those Guesthouses offer pleasant accommodations for the arriving bits, tired from an intense day’s work.

After arriving, they settle, waiting for the rest of the group. Once they are all together, and after each one showing their Letters, so that the Word can be read, they are all ready for another trip.

The Clocked Logic is precisely the tool the CPU uses to assure it’s able to organize and synchronize the information, in order that, at any given moment, the several circuits of the computer can freeze a specific bit pattern and process it.

For this, the CPU is provided with a time base for the circuitry, and signals to be synchronized. This time base is provided by the clock.

How does the processor get along with the other computer components, if they don’t know about that said clock?

In an ancient CPU, the clock frequency was some measly few hundreds MHz, that’s millions of cycles per second, and the behavior of the components was controlled by this clock, the same for all.

With the evolution of the CPU building technology, the CPU voltages lowered, and the clock frequencies went up to the order of 3 GHz, that’s 3,000 million cycles per second.

The CPU communicates with the memory and the other components through the copper lines that constitute the motherboard printed circuit.

With the growth of CPU frequencies, above a certain value, these copper lines were converted to antennas, and generated, or captured, noise (electromagnetic interference) that could distort the signals.

The clock frequencies of the several computer components evolved differently from the CPU clock frequency.

The different lengths of the copper lines traveled by each of the bits generated a phenomenon called “timing skew”.

Timing Skew is a phenomenon that has to do with limitations imposed by the propagation speed of an electrical signal in a conducting wire. When the clock frequency came up to such a value that, due to the length differences between lines, one bit of the same word did not reach its destination before the clock ticked, the information in the target after the clock tick would be wrong.

This is like the case where some bits have failed to reach the goal within the time granted to them by the CPU. The result will be corrupted because it lacks all the parts.

In conclusion, with the different and conditioned evolution of the clock value in the several computer components, it still remained necessary to synchronize them all together, and a way of generating a single clock signal that could reach the several components and deliver an intrinsic value for each, had to be found.

The frequency generator, the quartz crystal, is a Motherboard component, the PCB (Printed Circuit Board) to which all computer components are connected to, and through which they interrelate.

The Motherboard has the Chip PLL (Phase Locked Loop) responsible for correcting the clock frequency generated, to the clock value of each component, and Chips, who know the clock frequency of all the computer components, allowing their synchronization.

The clock value assigned to the CPU is called CPU internal clock. The clock value assigned to the Motherboard buses is called CPU external clock.

We hope we have made ​​clear this concept, and the important of the clock and contribution to the synchronization of all activities inside a computer. We will not go further into detail on this issue, or talk about issues related to clock frequencies of buses, memories, and other components. We’ll talk about this when we discuss the topic of the Motherboard.

We are developing our work on an imaginary computer with a basic 8 bit CPU and 8 bit bus. As the clock frequency is very low, it will be the same for all the components. It’s with this assumption that we will proceed.

The clock cycle is divided into four phases, as shown in Figure 1. These are:

• The rising edge.
• The stable period at high state (1).
• The falling edge.
• The stable period at low state (0).

Although the concept of these phases that last such a small period of time is very difficult to understand for us, as our time scale is very different, for the computer, it’s the reality.

In certain situations, particularly when the output of one circuit is treated in other circuits and returns to the input of the first, it is very likely that this still happens within the same clock cycle, or rather, while the clock is still stable with voltage.

Let’s take for granted that the electricity moves within a conductive medium at approximately 300,000 km/s, or at 0.3 meters/nanosecond.

A circuit with the clock frequency of 3 GHz has 3,000,000,000 clock cycles/second, or 1 clock cycle per 0.3 nanoseconds. The clock is at a stable high state during 1/6 of a nanosecond. During this time, one bit can travel 1/6 x 0.3 = 0.05 meters, 50,000,000 nanometers.

Even giving discounts of delays in transistors and other components, even in the propagation in conductive media, as you can see, the machine for the duration of the pulse is an infinity of time, during which the rise and fall of tension entities are measurable and significant.

This last paragraph shows the importance of the investigations that the department of electronics is doing in the field of time and propagation delays in nanocircuits.

For example, in a CPU chip with an area of about 1 cm2, and 2 billion transistors, how many transistors does the bit cross during its route within the longest circuit?

These are values ​​that seem insignificant, but they condition the values of the clock frequency of the CPU, making them no longer negligible.

Do computer circuits work in turns? Sometimes they are turned off and sometimes they are turned on, when the clock is at high or low?

The computer circuitry is powered by direct current. Information flowing through its circuits would be in constant motion until the power was turned off, if not held up somewhere.

It’s the clock signal that releases the bits with the information into the circuit, putting them in the output of the Edge Triggered Latches. But to analyze this question we will have to speak about circuits that we have not yet analyzed.

So,  before we proceed, we suggest that you take a look a the article Memorizing Circuits of this Chapter to read about ETL (Edge Triggered Latches)

The computer circuitry is powered by direct current. The signals, with information flowing through it, will be in permanent movement. This movement has nothing to do with the clock. While an obstacle, if nothing is done against the propagation of the signal, they will remain in perpetual motion within the circuit.

So, what is the role of the Clock in the midst of this permanent movement mess?

We recall the definition mentioned earlier:

Clocked Logic is the tool provided to the CPU in order to be able to organize and synchronize all the information circulating in the computer circuitry, in order that, at any given moment, it is able to freeze a particular bit pattern and process it.

This is exactly the role of the Clock, helped by the ETL, strategically placed along the circuitry.

When the Clock rises or falls it sends the bits to a certain circuit by placing them in the ETL output. From there, they will freely travel along that circuit for the amount of time defined by the Clock, where they will act over transistor’s gates, or go through others, until they reach an ETL, placed somewhere along their path.

There, the bits will get in and stop, once again being dependent of the Clock, they will be stuck in the hall, waiting for the Clock rise, or fall, in order to be released to the ETL output, where they will begin traveling to another circuit, executing a new task.

So, the ETL is the tool provided to the Clocked Logic, in order for it to be able to, at any moment, freeze a particular bit pattern and process it. And the Clock is the tool provided to the Clocked Logic in order for it to be able to operate the ETL, and determine the maximum amount of time granted to the bits for completing their tasks.

Therefore, the information (bits) propagates continuously in a computer circuitry, both day and night, as the circuit is powered with direct current.

In this circuit, some obstacles are created (the Edge Triggered Latches) that retain a particular propagation of the bit group until it has them all together (freeze a particular configuration bits).

Then it’s time for the Clock to interrupt the bits’ rest, and signal that they can be processed together (and process them), it throws them with a new task (triggers the ETL) with a given amount of time to be fulfilled (determining the time).

We hope we have properly clarified this issue of Clocked Logic. But this doesn’t stop there. During this work, we’ll make constant references to Clocked Logic, as you’ll see.

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